SVML-Special Math Functions-YMM#

_mm256_svml_ceil_pd#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256d

Param Types:

__m256d a

Param ETypes:

FP64 a

__m256d _mm256_svml_ceil_pd(__m256d a);

Intel Description

Round the packed double-precision (64-bit) floating-point elements in “a” up to an integer value, and store the results as packed double-precision floating-point elements in “dst”. This intrinsic may generate the “roundpd”/”vroundpd” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 3
        i := j*64
        dst[i+63:i] := CEIL(a[i+63:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_ceil_ps#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256

Param Types:

__m256 a

Param ETypes:

FP32 a

__m256 _mm256_svml_ceil_ps(__m256 a);

Intel Description

Round the packed single-precision (32-bit) floating-point elements in “a” up to an integer value, and store the results as packed single-precision floating-point elements in “dst”. This intrinsic may generate the “roundps”/”vroundps” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 7
        i := j*32
        dst[i+31:i] := CEIL(a[i+31:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_floor_pd#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256d

Param Types:

__m256d a

Param ETypes:

FP64 a

__m256d _mm256_svml_floor_pd(__m256d a);

Intel Description

Round the packed double-precision (64-bit) floating-point elements in “a” down to an integer value, and store the results as packed double-precision floating-point elements in “dst”. This intrinsic may generate the “roundpd”/”vroundpd” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 3
        i := j*64
        dst[i+63:i] := FLOOR(a[i+63:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_floor_ps#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256

Param Types:

__m256 a

Param ETypes:

FP32 a

__m256 _mm256_svml_floor_ps(__m256 a);

Intel Description

Round the packed single-precision (32-bit) floating-point elements in “a” down to an integer value, and store the results as packed single-precision floating-point elements in “dst”. This intrinsic may generate the “roundps”/”vroundps” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 7
        i := j*32
        dst[i+31:i] := FLOOR(a[i+31:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_round_pd#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256d

Param Types:

__m256d a

Param ETypes:

FP64 a

__m256d _mm256_svml_round_pd(__m256d a);

Intel Description

Round the packed double-precision (64-bit) floating-point elements in “a” to the nearest integer value, and store the results as packed double-precision floating-point elements in “dst”. This intrinsic may generate the “roundpd”/”vroundpd” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 3
        i := j*64
        dst[i+63:i] := ROUND(a[i+63:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_round_ps#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256

Param Types:

__m256 a

Param ETypes:

FP32 a

__m256 _mm256_svml_round_ps(__m256 a);

Intel Description

Round the packed single-precision (32-bit) floating-point elements in “a” to the nearest integer value, and store the results as packed single-precision floating-point elements in “dst”. This intrinsic may generate the “roundps”/”vroundps” instruction.

Intel Implementation Psudeo-Code

FOR j := 0 to 7
        i := j*32
        dst[i+31:i] := ROUND(a[i+31:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_ceil_ph#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256h

Param Types:

__m256h a

Param ETypes:

FP16 a

__m256h _mm256_svml_ceil_ph(__m256h a);

Intel Description

Round the packed half-precision (16-bit) floating-point elements in “a” up to an integer value, and store the results as packed half-precision floating-point elements in “dst”.

Intel Implementation Psudeo-Code

FOR j := 0 to 15
        i := j*16
        dst[i+15:i] := CEIL(a[i+15:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_floor_ph#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256h

Param Types:

__m256h a

Param ETypes:

FP16 a

__m256h _mm256_svml_floor_ph(__m256h a);

Intel Description

Round the packed half-precision (16-bit) floating-point elements in “a” down to an integer value, and store the results as packed half-precision floating-point elements in “dst”.

Intel Implementation Psudeo-Code

FOR j := 0 to 15
        i := j*16
        dst[i+15:i] := FLOOR(a[i+15:i])
ENDFOR
dst[MAX:256] := 0

_mm256_svml_round_ph#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256h

Param Types:

__m256h a

Param ETypes:

FP16 a

__m256h _mm256_svml_round_ph(__m256h a);

Intel Description

Round the packed half-precision (16-bit) floating-point elements in “a” to the nearest integer value, and store the results as packed half-precision floating-point elements in “dst”.

Intel Implementation Psudeo-Code

FOR j := 0 to 15
        i := j*16
        dst[i+15:i] := ROUND(a[i+15:i])
ENDFOR
dst[MAX:256] := 0

_mm256_trunc_ph#

Tech:

SVML

Category:

Special Math Functions

Header:

immintrin.h

Searchable:

SVML-Special Math Functions-YMM

Register:

YMM 256 bit

Return Type:

__m256h

Param Types:

__m256h a

Param ETypes:

FP16 a

__m256h _mm256_trunc_ph(__m256h a);

Intel Description

Truncate the packed half-precision (16-bit) floating-point elements in “a”, and store the results as packed half-precision floating-point elements in “dst”

Intel Implementation Psudeo-Code

FOR j := 0 to 15
        i := j*16
        dst[i+15:i] := TRUNCATE(a[i+15:i])
ENDFOR
dst[MAX:256] := 0